1. Field of the Invention
This invention relates to a silicon epitaxial wafer of which a main surface is {110} and a method for manufacturing the same, and more specifically relates to a silicon epitaxial wafer with high quality having low surface roughness and a manufacturing method thereof.
This application claims priority on Japanese Patent Application No. 2004-285369, filed on Sep. 29, 2004, the content of which is incorporated herein by reference.
2. Background Art
In general, a single crystal substrate having a main surface of {100} or {111} is used as a substrate for manufacturing a silicon epitaxial wafer; however in some cases, {110} single crystal substrates are used for some special MPUs and applications of semiconductor pressure sensors.
In a silicon epitaxial wafer manufactured using a single crystal substrate having a main surface of {110}, there are cases in which periodic stripe-like irregularities and surface roughening occur in a surface as shown in FIG. 6.
With regard to its surface roughness, for example, a roughness (Rms) measured by an atomic force microscope (AFM) may be 0.2 nm or more, and a P-V value may be 1.5 nm or more.
In the case in which those irregularities and surface roughening are large, the surface appears to be colored such as white, brown, or iridescent or appears to be clouded when observed visually under a high-luminance converged light. The surface roughening is likely to be caused by a formation of facet structures in a Si (110) surface as described in Non-Patent Document 1. In the case in which the irregularities due to the formation of these facet structures become excessively large, for example, they may cause defective characteristics in a semiconductor device fabricated thereon.
Therefore, those surface irregularities and surface roughening must be reduced.
Examples of a method for manufacturing a silicon epitaxial wafer using the above-mentioned single crystal substrate having the main surface of {110} may include a method in which an epitaxial growth is performed on a silicon single crystal substrate having a surface orientation of (110) (from −0.5° to +0.5°) in a same manner as that performed on a (100) single crystal silicon substrate. In this manufacturing method, as shown in AFM measurement results in FIG. 6, a surface may be formed which has periodic banded irregularities of several nanometers to several dozens of micrometers, or a surface may be formed which has irregularities and on which facets are formed.
As mentioned above, in the case in which those irregularities and surface roughening are large, the surface appears to be colored such as white, brown, or iridescent or appears to be clouded when observed visually under a high-luminance converged light.
Also, In the case in which the irregularities due to the formation of these facet structures become excessively large, for example, defective characteristics may be caused in a semiconductor device fabricated thereon. Therefore, those surface irregularities and surface roughening must be reduced.
(Non-Patent Document 1) Yamamoto et al., J. Appl. Phys. Vol. 75, No. 5, 2421 (1994).